(a) Field of the Invention
The present invention relates to a capacitor and a method of manufacturing the same. Particularly, it relates to a capacitor which is adapted to be buried into a wiring board on which an electronic component (chip) such as a semiconductor element is to be mounted, and to a method of manufacturing the capacitor.
Since a wiring board having such a capacitor incorporated therein plays a role in mounting of a semiconductor element or the like, the wiring board is also referred to as a “semiconductor package” or simply a “package” for convenience in the description below.
(b) Description of the Related Art
With the demand for further miniaturization and high-density of wirings in a semiconductor package, wiring patterns are further coming closer to each other ever. Accordingly, there may arise problems such as a crosstalk noise occurring among wirings and a fluctuation in the electric potential of a power-supply line or the like. Especially, in a package on which a chip such as an MPU (microprocessor unit) requiring a high-speed switching operation is mounted, a crosstalk noise is likely to occur in accordance with an increase in frequency. In addition, some switching noise occurs when a switching element is turned on and off at a high speed, resulting in the likelihood of fluctuation in the electric potential of a power-supply line or the like. Thus, for the purpose of stabilizing the power-supply voltage and reducing the switching noise and the like, “decoupling” of a power-supply line or the like by implementing a capacitor function in a semiconductor package has been carried out.
A commonly-used method for implementing a capacitor function in a wiring board (package) is to electrically connecting a chip-shaped capacitor component (chip capacitor) to a conductor portion (land or pad) on a board by using a conductive material such as a solder (i.e., the component is surface-mounted). Here, the capacitor component has a multilayer parallel plate structure in which high-dielectric layers are interleaved with electrode layers.
Furthermore, with a recent progressive reduction in the size and thickness of electronic devices, such as mobile and portable devices, techniques for implementing a capacitor function in a board have been put into practical use. For example, there is a technique in which, after a high-permittivity insulating sheet (a sheet of a resin mixed with an inorganic filler for increasing the permittivity) is disposed inside a board, conductor layers (wiring layers) constituting respective electrodes of a capacitor are formed above and below the resin sheet (dielectric) so as to interpose the resin sheet therebetween. There is also a technique in which, after a capacitor formed into a film shape in advance is buried into a board, electrodes of the capacitor are respectively connected to wiring layers located above and below the capacitor.
An example of a technique related to the above-mentioned prior art is described in Japanese Unexamined Patent Publication (Kokai) 2007-150180. In the technique disclosed in this document, a flexible circuit board is manufactured as follows. A wiring pattern is formed on at least one surface of a flexible board. A predetermined material is filled into a groove formed with a predetermined depth and a predetermined pattern shape on the one surface, so that a circuit component integrated with the board is formed. Then, the circuit component is connected to the wiring pattern. As one configuration of the circuit component, a capacitor is formed which includes a pair of comb-shaped electrodes formed by filling an electrode material into grooves formed in comb shapes facing each other, and in which a base material between the pair of comb-shaped electrodes is used as a dielectric layer.
In the conventional art as described above, various techniques have been put into practical use for implementing a capacitor function, which exerts the decoupling effects, in a wiring board (package). In the configuration in which a component (chip capacitor) is surface-mounted on a board, however, the mounting of the component makes it difficult to reduce the thickness of the board.
Further, this configuration poses a problem as follows. Since the chip capacitor is surface-mounted on the board, the route length of wiring laid for connecting the chip capacitor and a power supply or a ground terminal of a semiconductor element mounted on the same board becomes longer depending on the positional relationship between the chip capacitor and the semiconductor element (especially, when the semiconductor element and the chip capacitor are disposed with the board in between). As a result, the inductance is increased to diminish the decoupling effects. Moreover, when a semiconductor element requiring a high-speed switching operation is mounted, a large number of chip capacitors need to be provided to achieve the desired decoupling effect. Accordingly, there also arises a problem in that a process required for mounting the chip capacitors becomes longer.
In the meantime, the configuration in which a capacitor function is implemented in a board has an advantage in terms of the decoupling effect, compared with the configuration in which a chip capacitor is surface-mounted on a board. However, the former configuration has a problem in that it is difficult to obtain a large capacitance due to design restrictions as follows.
Specifically, it is necessary to increase the capacitance of a capacitor in order to effectively allow the desired decoupling effect to function. For example, where opposing areas of electrodes (portions of conductor layers) interposing a dielectric layer in between in a board are increased, the majority of portions of the conductor layers need to be allocated to the electrodes exclusively. Accordingly, the area occupied by the electrodes is increased, and thus there has been an inconvenience that the degree of freedom in design of other wiring patterns on the conductor layers is reduced. As a result, there arises a problem in that it is difficult to incorporate a capacitance structure having a desirably large capacitance into the wiring board.
There is another technique for increasing the opposing areas of electrodes, in which an insulating layer (resin layer) constituting a dielectric and a conductor layer constituting an electrode are alternately stacked with each other. In this technique, it is necessary to stack the layers one by one as in a build-up process. Accordingly, the term required for manufacturing becomes longer, resulting in an increase in the manufacturing cost.